Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2008-04-08
2008-04-08
Le, Dieu-Minh (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S718000
Reexamination Certificate
active
10977922
ABSTRACT:
A buffered memory module including a downstream buffer, a downstream receiver, an upstream driver, an upstream receiver. The downstream buffer and the downstream receiver are both adapted for connection to a downstream memory bus in a packetized cascaded interconnect memory subsystem. The upstream driver and the upstream receiver are both adapted for connection to an upstream memory bus in the memory subsystem. During a test of the memory module, the upstream driver is connected to the downstream receiver and the downstream driver is connected to the upstream receiver. The memory module also includes one or more storage registers, a microprocessor and a service interface port. The microprocessor includes instructions for executing the test of the memory module including storing results of the test in the storage registers. The service interface port receives service interface signals that initiate the execution of the test and accesses the storage registers to determine the results of the test.
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Cowell Thomas M.
Ferriaolo Frank D.
Gower Kevin C.
LaPietra Frank
Augspurger Lynn
Cantor & Colburn LLP
Le Dieu-Minh
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