System, method and storage medium for memory management

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Reexamination Certificate

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07386679

ABSTRACT:
A system for memory management including a tag controlled buffer in communication with a memory device. The memory device includes a plurality of pages divided into a plurality of individually addressable lines. The tag controlled buffer includes a prefetch buffer including at least one of the individually addressable lines from the memory device. The tag controlled buffer also includes a tag cache in communication with the prefetch buffer. The tag cache includes a plurality of tags, where each tag is associated with one of the pages in the memory device and each tag includes a pointer to at least one of the lines in the prefetch buffer. Access to the lines in the prefetch buffer is controlled by the tag cache.

REFERENCES:
patent: 4658351 (1987-04-01), Teng
patent: 4807110 (1989-02-01), Pomerene et al.
patent: 5361391 (1994-11-01), Westberg
patent: 5423011 (1995-06-01), Blaner et al.
patent: 5544342 (1996-08-01), Dean
patent: 5715421 (1998-02-01), Akiyama et al.
patent: 5761706 (1998-06-01), Kessler et al.
patent: 5796971 (1998-08-01), Emberson
patent: 5887151 (1999-03-01), Raz et al.
patent: 5996071 (1999-11-01), White et al.
patent: 6012106 (2000-01-01), Schumann et al.
patent: 6119222 (2000-09-01), Shiell et al.
patent: 6134643 (2000-10-01), Kedem et al.
patent: 6182201 (2001-01-01), Arimilli et al.
patent: 6286075 (2001-09-01), Stracovsky et al.
patent: 6314494 (2001-11-01), Keltcher et al.
patent: 6535961 (2003-03-01), Wilkerson et al.
patent: 6598123 (2003-07-01), Anderson et al.
patent: 6606617 (2003-08-01), Bonner et al.
patent: 6678795 (2004-01-01), Moreno et al.
patent: 6687794 (2004-02-01), Malik
patent: 6973547 (2005-12-01), Nilsson et al.
patent: 7073030 (2006-07-01), Azevedo et al.
patent: 7099999 (2006-08-01), Luick
patent: 7133995 (2006-11-01), Isaac et al.
patent: 7266676 (2007-09-01), Tran et al.
patent: 2003/0221069 (2003-11-01), Azevedo et al.
patent: 2004/0030840 (2004-02-01), Hesse et al.
patent: 0173893 (1986-03-01), None
patent: 8161230 (1996-06-01), None
Adaptive Variation of the Transfer Unit in a Storage Hierarchy, IBM J. Res. Develop., vol. 22, No. 4, Jul. 1978, pp. 405-412—by P.A. Franaszek and B. T. Bennett.
Distributed Prefetch-buffer/Cache Design for High Performance Memory Systems, pp. 254-263, Departments of Computer Science and Electrical Engineering, Duke University, Durham, NC, 1996—by Thomas Alexander and Gershon Kedem.
DRAM-Page Prediction and Prefetching, pp. 267-275, Computer Science Department, Duke University, Durham, NC, 2000 by Haifeng Yu and Gershon Kedem.
On the Stability of Temporal Data Reference Profiles, Microsoft Research, Redmond, WA—by Trishul M. Chilimbi.
TCP: Tag Correlating Prefetchers, by Zhigang Hu of IBM Corp.; Margaret Martonosi of Princeton University; and Stefanos Kaxiras of Agere Systems.
Performance Study of the Filter Date Cache on a Superscalar Processor Architecture, by Julio Sahuquillo, Salvador Petit and Ana Pont of Universidad Politechnica de Valencia, Spain and Veljko Milutinovic of University of Belgrade, Yugoslavia.
A Data Cache with Multiple Cashing Strategies Tuned to Different Types of Locality, by Antonio Gonzalez, Carlos Aliagas and Mateo Valero of Universitat Politecnica de Catalunya, Barcelona, Spain.
Filtering Superfluous Prefetches using Density Vectors by Wei-Fen Lin, Steven K. Reinhardt of University of Michigan; Doug Burger of University of Texas at Austin; and Thomas R. Puzak of IBM Corporation.
Page Fault Behavior and Prefetching in Software DSMs, by Ricardo Bianchini, Raquel Pinto, and Claudio L. Amorim of Federal University of Rio de Janeiro, Brazil, Technical Report ES-401/96, Jul. 1996.
Adaptive Caching for Demand Prepaging, by Scott F. Kaplan, Lyle A. McGeoch, and Megan F. Cole of Amherst College, Massachusetts—ISMM '02, Jun. 20-21, 2002, Berlin Germany.
Time Series Prediction using Recurrent SOM with Local Linear Models, Research Reports B15, Oct. 1997—by Timo Koskela, Markus Varsta, Jukka Heikkonen, and Kimmo Kashi of Helsinki University of Technology, Finland.
Temporal Sequence Processing using Recurrent SOM, by Timo Koskela, Markus Varsta, Jukka Heikkonen, and Kimmo Kaski of Helsinki University of Technology, Finland.

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