Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-12-05
2006-12-05
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07146594
ABSTRACT:
A method for electrical schematic creation includes loading a schematic definition file, and determining circuit component placement relationships according to the schematic definition file and a component rule set. The method also includes defining a location of a first component of the schematic definition file, and defining locations of a plurality of second components of the schematic definition file in relation to the location of the first component. The method also includes creating a schematic output file corresponding to the circuit component placement relationships and the schematic definition file, so that the schematic output file describes an automatically-generated electrical schematic corresponding to the schematic definition file.
REFERENCES:
patent: 5463563 (1995-10-01), Bair et al.
patent: 5550714 (1996-08-01), Nishiyama
patent: 5694481 (1997-12-01), Lam et al.
patent: 6311316 (2001-10-01), Huggins et al.
patent: 6449762 (2002-09-01), McElvain
patent: 6545673 (2003-04-01), Shiitani et al.
patent: 6735742 (2004-05-01), Hatsch et al.
patent: 6738957 (2004-05-01), Gont et al.
patent: 6904571 (2005-06-01), Schmidt et al.
patent: 6980211 (2005-12-01), Lin et al.
Naveen et al., “An Automactic Netlist-to-Schematic Generator,” IEEE, 1993, pp. 36-41.
Kim et al., “Right Topologizer: An Efficient Schematic Generator for Multi-Level Optimization,” IEEE, 2000, pp. 387-391.
Hutchings et al., “Developing and Debugging FPGA Applications in Hardware with JHDL,” IEEE, 1999, pp. 554-558.
Goike Thomas J.
Hague Jonathan R.
Siek Vuthe
UGS Corp.
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