Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-08-29
2000-09-05
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711148, 711206, G06F 1208
Patent
active
061157902
ABSTRACT:
A system, method and computer program product for distributing page caches among memory objects and, in a DSM system, among memories in the DSM system. The system, method and computer program product provides a separate page cache for each memory object. Each separate page cache associates page frame data structures that represent pages of memory that store a portion of an associated memory object. A separate mutual exclusion mechanism is provided for each page cache for protecting the integrity of the page caches during page cache operations. Page cache operations, such as adding and deleting page frame data structures, checking and updating state information in page frame data objects, and identifying page frame data objects that correspond to particular memory objects or memory object logical offsets, can be performed for different memory objects in parallel.
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Schimmel, UNIX System for Modern Architectures: Symmetric Multiprocessing and Caching for Kernel Programmers, Addison-Wesley Professional Computing Series, 1994, pp. vii-xiv and 5-8.
Cabeca John W.
Chow Christopher S.
Silicon Graphics Inc.
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