System, method and computer program product for implementing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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Reexamination Certificate

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07581162

ABSTRACT:
A method, system, apparatus and computer program product for correcting errors in a signal transmission using a rate ¾ low density parity check (LDPC) code. At least a portion of a received data message is encoded by using a parity check matrix of the LDPC code. The encoded data message is transmitting in a signal transmission over a communication channel to a receiving device in the communication network. After being received, the encoded portion of the data message is decoded using a parity check matrix of the LDPC code to obtain the data message. For example, the encoding and decoding can be performed using a parity check matrix corresponds to a coded block size (N) equal to 1944 for communicating data in compliance with an 802.11n standard.

REFERENCES:
patent: 7020829 (2006-03-01), Eroz et al.
patent: 7191378 (2007-03-01), Eroz et al.
patent: 7243287 (2007-07-01), Cameron et al.
patent: 7516390 (2009-04-01), Shen et al.
patent: 2004/0019845 (2004-01-01), Eroz et al.
patent: 2006/0242534 (2006-10-01), Livshitz
Yuan Li et al., Bit to symbol mapping in LDPC coded modulations, 2005, IEEE, p. 1-4.

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