Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2005-09-06
2005-09-06
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S150000, C709S212000, C709S214000, C709S215000, C710S001000, C710S022000, C710S052000, C710S056000, C710S100000, C710S260000, C710S263000, C710S308000, C710S310000
Reexamination Certificate
active
06941424
ABSTRACT:
A system and method of enhanced backplane messaging among a plurality of computer boards communicating over a common bus uses a set of pre-allocated buffers on each computer board to receive messages from other computer boards. Each sending computer board is represented on each remote computer board by a descriptor ring with pointers to pre-allocated buffers on that remote computer board. When a sending computer board has a message to deliver to a remote computer board, the sending computer board uses its DMA controller to transfer the message into the pre-allocated buffers on the remote computer board. The sending computer board also sends a mailbox interrupt to the remote computer board. The remote computer board interrupt handler moves the messages from the descriptor rings to the receiving application(s) via pointer manipulation. Chained DMA transfers are used to eliminate any data transfers by the processor itself across the bus.
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Bade Paul R.
Kahn Steven A.
Verven David M.
Cooch Francis A.
Gaffin Jeffrey
Nguyen Tanh Q.
The Johns Hopkins University
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