System, method and computer program product for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07607115

ABSTRACT:
A system, method and computer program product are provided for verifying sequential equivalence. In use, input is fed to a first system and a second system in a timing-independent manner to generate output. To this end, sequential equivalence of the first system and the second system may be verified, based on the output.

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patent: 7100060 (2006-08-01), Cai et al.
patent: 7373618 (2008-05-01), Khoo et al.
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patent: 2002/0144218 (2002-10-01), Levin et al.
patent: 2007/0136701 (2007-06-01), Baumgartner et al.
patent: 2007/0220461 (2007-09-01), Baumgartner et al.
patent: 2008/0072195 (2008-03-01), Mukaiyama
patent: 2008/0178132 (2008-07-01), Baumgarter et al.
U.S. Appl. No. 11/129,238, filed May 12, 2005.

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