System, method and apparatus to implement low power high...

Details System, method and apparatus to implement low power high... System, method and apparatus to implement low power high...

2007-11-13

2007-11-13

Tran, Khanh C. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

10353336

ABSTRACT:
The present invention provides for operation of a digital communication receiver having multiple operational modes so that power consumption of the system can be kept at a minimum by using the lowest power operation for the system components performing tasks associated with each of the respective one of the multiple operational modes. An example is the receiver A/D converter operation with the lowest power to provide the desired resolution. Also, the invention provides novel architectures for implementing scalable resolution A/D converters. Furthermore, the invention generally includes a novel architecture for controlling the dynamic range of an A/D converter. In addition, the invention generally involves novel architectures for controlling the dynamic range of an A/D converter to alleviate difficulties associated with AGC control loops. Multiple exemplary embodiments are disclosed.

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Dick et al. FPGA Signal Processing Using Sigma-Delta Modulation, IEEE Signal Processing Magazine, Jan. 2000, p. 20-35.

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