Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-05-06
2008-05-06
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C714S006130
Reexamination Certificate
active
07370175
ABSTRACT:
A method according to one embodiment may include partitioning a plurality of core processors into a main partition comprising at least one processor core capable of executing an operating system and an embedded partition comprising at least one different processor core. The main partition and embedded partition may communicate with each other through a bridge. The embedded partition of this embodiment may be capable of: mapping two or more mass storage systems, coupled to the embedded partition, into a single logical device; presenting the logical device to the bridge; and receiving at least one I/O request, generated by the main partition and directed to the logical device, and in response to the I/O request, the embedded partition may be further capable of communicating with at least one of the two or more mass storage systems using at least one communication protocol to process said I/O request; and reporting the status of the I/O request to the main partition, via the bridge.
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Rothman Michael A.
Zimmer Vincent J.
Grossman Tucker Perreault & Pfleger PLLC
Intel Corporation
Verbrugge Kevin
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