System, method, and apparatus for reducing power consumption...

Details System, method, and apparatus for reducing power consumption... System, method, and apparatus for reducing power consumption...

2007-10-30

2007-10-30

Patel, Nitin C. (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S322000, C713S323000, C712S209000, C712S210000

Reexamination Certificate

active

10983913

ABSTRACT:
Included in this disclosure is a circuit for reducing power consumption in a microprocessor. The circuit comprises a microprocessor, at least one full instruction decoder configured to decode a present instruction, and at least one subset instruction decoder configured to determine whether the present instruction potentially needs a register. A memory element is also included and is configured to hold data from a previous instruction. A selector is included and configured to output either the previous instruction or the decoded present instruction, based on the subset instruction decoder.

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patent: 2003/0172258 (2003-09-01), Krishnan
patent: 535089 (2003-06-01), None

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