Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2004-01-27
2009-11-10
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S030000, C714S037000, C714S038110, C714S047300
Reexamination Certificate
active
07617416
ABSTRACT:
Presented herein is a system, method, and apparatus for firmware code-coverage in complex system on chip. A circuit for analyzing code coverage of firmware by test inputs comprises an input and a memory. The input receives an address from a code address bus. The memory stores recorded addresses from the code address bus. The memory comprises a plurality of memory locations, each of the memory locations mapped to a particular one of a corresponding plurality of addresses associated with the firmware. The contents of the memory location associated with the address received from the code address bus being incremented responsive to receipt of the address.
REFERENCES:
patent: 5968188 (1999-10-01), Rana
patent: 6708143 (2004-03-01), Kurshan
patent: 2001/0013119 (2001-08-01), Agarwal
patent: 2005/0193254 (2005-09-01), Yee
Gupta Shiv Kumar
Ilpakurty Ravi
Narendranath K. S.
Beausoliel Robert
Broadcom Corporation
Manoskey Joseph D
McAndrews Held & Malloy Ltd.
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