Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2008-04-30
2010-12-28
Duncan, Marc (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S043000, C714S047300
Reexamination Certificate
active
07861110
ABSTRACT:
A system, method, and adapter for creating fault-tolerant communication busses from standard components, are described. Fault-tolerant interface logic is provided for transmitting and receiving system health and system management signals to and from a module that is designed to be connected to a single RS-485 bus. The fault-tolerant interface logic enables the module to selectively communicate via at least two redundant half-duplex, multipoint, differential RS-485 busses. The fault-tolerant interface logic includes a first RS-485 transceiver connected to a first RS-485 bus, a second RS-485 transceiver connected to a second RS-485 bus, selector logic responsive to a control signal for selecting one of the first and the second busses to receive signals from and for transmitting the received signals to the module, and software logic executable on a baseboard management controller (BMC) chip. The software logic includes control logic for monitoring the health of the selected bus and for providing the control signal to the selector logic.
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Curtis Paul
Ferrari Michael T.
Haley Neil
Duncan Marc
Egenera, Inc.
Wilmer Cutler Pickering Hale and Dorr LLP
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