System LSI development apparatus and the method thereof for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

06634017

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
The subject application is related to subject matter disclosed in the Japanese Patent Applications No.Tokugan2000-027432 filed in Feb. 2, 2001, to which the subject application claims priority under the Paris Convention and which is incorporated by reference herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system LSI development apparatus comprising a plurality of software components that operate on a computer system, used for developing and designing a system LSI that contains a configurable processor having at least an optional instruction defined therein; and the system LSI development method thereof.
2. Description of the Related Art
In recent years, an LSI design and development system for developing an LSI optimal to applications within a short period of time is expected because of diversified needs for an LSI oriented to an embedded device such as multimedia processing and its shorter market cycle.
In general, in the case where a general-purpose processor is incorporated in an LSI, the hardware design cost is almost equal to zero; however, the performance of applications cannot be fully achieved. Therefore, recently, there has been provided a configurable processor in which instructions or memory configuration and the like can be selected, and at the same time, a configurable processor provider provides a system of specifying a configuration, thereby outputting a synthesizable hardware description According to such processor and system, optional instructions or memory size are specified, thereby making it possible to obtain a processor having its configuration optimal to applications within a short period of time.
On the other hand, in general, if an instruction set or the like is changed, a software development tool suite including compiler, assembler or instruction set simulator including system LSI components (“simulator” hereafter) must be changed. Thus, by specifying a configuration, there is provided a system of generating a software development tool suite as well as hardware description. According to such system, a workload and time required for designing a software development tool suite can be significantly reduced.
As has been described above, by using a configurable processor, a processor configuration optimal to applications can be obtained within a short period of time, and at the same time, software development can be performed in accordance with a conventional flow of operation. However, in order to better achieve the performance of applications, some parts of the applications are implemented as hardware, and it is considered that a system LSI has its configuration that is composed of processor and these dedicated hardware, which often results in an optimal LSI configuration. However, in prior art, only processor configuration can be customized, and a configuration including user defined hardware modules to be added to the processor cannot be handled. Thus, currently, as for an LSI configuration including processor and dedicated hardware configuration (description), architecture consideration, performance evaluation, design verification and software development cannot be performed, thus making it difficult to develop an LSI with its more optimal performance.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve the foregoing technical problem. It is an object of the present invention to provide a technique, which makes it possible to develop and design an LSI with its optimal performance.
According to the present invention, there is provided a system LSI development apparatus comprising a plurality of software components that operate on a computer system, used for developing and designing a system LSI that contains a processor having at least an optional instruction defined therein, the system LSI development apparatus comprising: a system LSI development environment generating unit causing software to operate based on change item definition information concerning system LSI development and design, thereby generating hardware description, verification environment, and development and design tools for the system LSI, wherein the change item definition information contains at least one item of information concerning an optional instruction information, a user defined module and a multiprocessor configuration. According to the thus configured system LSI development apparatus, with respect to all possible combinations of change item definition information containing at least one of the optional instruction, user defined module and multiprocessor configuration, system LSI hardware containing a processor having at least an optional instruction defined therein, a plurality of verification environment and a development tool suite are consistently created in an exhaustive or parallel manner, thus making it possible to develop a system LSI optimal to applications within a short period of time.
Meanwhile, the term “unit” is used in the description of the embodiments of the present invention to represent a program or a section of a program that performs a particular task. Also, the term “change item” is used in the description of the embodiments of the present invention to represent a value (which is used usually as a constant in many cases but sometimes as a variable in a few cases) to be initialized with an arbitrary number or the like by the user in advance of compilation.
Other and further objects and features of the present invention will become obvious upon understanding of the illustrative embodiments about to be described in connection with the accompanying drawings or will be indicated in the appended claims, and various advantages not referred to herein will occur to one skilled in the art upon employing of the invention in practice.


REFERENCES:
patent: 5423023 (1995-06-01), Batch et al.
patent: 5493508 (1996-02-01), Dangelo et al.
patent: 5896521 (1999-04-01), Shackleford et al.
patent: 6006022 (1999-12-01), Rhim et al.
patent: 2002/0046391 (2002-04-01), Ito et al.
patent: WO 00/22553 (2000-04-01), None
patent: WO 00/46704 (2000-08-01), None
Ricardo E. Gonzalez, XTENSA: A Configurable and Extensible Processor, IEEE micro 2000 No. 2, pp. 60-70.

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