System-in-package structure

Details System-in-package structure System-in-package structure

2006-05-25

2008-08-26

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

C257S787000

Reexamination Certificate

active

07417329

ABSTRACT:
A system-in-package structure includes a carrier substrate having a molding area and a periphery area, at least a chip disposed in the molding area, an encapsulation covering the chip and the molding area, a plurality of solder pads disposed in the periphery area, and a solder mask disposed in the periphery area and partially exposing the surface of the solder pads. The solder mask includes at least a void therein.

REFERENCES:
patent: 5744084 (1998-04-01), Chia
patent: 6617680 (2003-09-01), Chien-Chih
patent: 6635209 (2003-10-01), Huang
patent: 6692988 (2004-02-01), Fang
patent: 6838761 (2005-01-01), Karnezos
patent: 7208844 (2007-04-01), Andoh
patent: 2007/0228542 (2007-10-01), Hussa

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