System having parallel data processors which generate...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C375S354000, C709S248000, C710S200000, C701S003000, C714S799000

Reexamination Certificate

active

11198198

ABSTRACT:
A high assurance processing system includes a plurality of data processors coupled in parallel, a bridge coupled to the plurality of data processors, and an input/output processor coupled to the bridge for coupling to a sensor and an effector. Sensor data passes to the bridge through the input/output processor for processing by the parallel data processors, which generate redundant effector data for comparison by the bridge to detect errors. If data matches are found, data is transmitted to the effector.

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patent: 6792560 (2004-09-01), Francis et al.
patent: 6839868 (2005-01-01), Pignol
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patent: 6915444 (2005-07-01), Vasko et al.
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patent: 7107358 (2006-09-01), Vasko et al.
patent: 2006/0287780 (2006-12-01), Hutton
patent: 2007/0033511 (2007-02-01), Davies
“A methodology for the rapid injection of transient hardware errors” by Yount et al. (abstract only) Publication Date: Aug. 1996.

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