Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-02-21
2006-02-21
Peyton, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S133000, C711S142000, C711S144000, C711S159000, C709S217000, C707S793000, C707S793000
Reexamination Certificate
active
07003631
ABSTRACT:
A system comprises a plurality of nodes, each node comprising one or more coherent agents coupled to an interconnect. Ownership of a coherency block accessed by a transaction on the interconnect is transferred responsive to transmission of the address on the interconnect. The system further includes a second interconnect to which the plurality of nodes are coupled, wherein ownership of a coherency block is transferred on the second interconnect responsive to a transmission of the data comprising the coherency block on the second interconnect. A first node of the plurality of nodes issues a coherency command on the second interconnect to fetch the coherency block in response to the transaction on the interconnect within the first node, whereby ownership transfers within the first node prior to ownership transferring from another one of the plurality of nodes to the first node.
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Broadcom Corporation
Garlick Harrison & Markison LLP
Peyton Brian R.
Truong Bao Quoc
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