Electrical computers and digital data processing systems: input/ – Input/output data processing
Patent
1997-09-30
2000-10-03
An, Meng-Ai T.
Electrical computers and digital data processing systems: input/
Input/output data processing
710 3, 710 5, 710 22, 710 24, 710 26, 710 33, 710 35, 711111, 711112, 711114, 709250, G06F 1300
Patent
active
061286699
ABSTRACT:
An apparatus for decoupling input/output (I/O) from host processing through main memory. A command packet architecture and distributed burst engine for communicating data to an I/O device without using memory mapped I/O or host processor synchronization. The packet architecture includes a header having fields for linking packets in a list with physical and virtual addresses, thereby eliminating address translations. The distributed burst engine includes buffers and controllers for bursting the linked lists of packets between main memory and the I/O device. Doorbell registers are included for the host processor to indicate to the DBE that an event has occurred. The distributed burst engine is versatile enough to be bus independent and located virtually anywhere between main memory and the I/O device, such as a bus bridge.
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Bonola Thomas J.
Moriarty Michael P.
Purcell Brian T.
An Meng-Ai T.
Compaq Computer Corporation
El-Hady Nabil
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