Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2001-07-31
2002-10-22
Mai, Son (Department: 2818)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S185180, C365S185110
Reexamination Certificate
active
06469942
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to boost circuits for use in low-power memory devices, and more particularly, to a word line boost circuit that is independent of supply voltage.
BACKGROUND OF THE INVENTION
For low voltage operation of a memory device, for example a “Flash” memory device, word line-voltage-boosting is used to boost the voltage levels of word line signals used to operate the memory.
FIG. 1
shows a diagram of a typical boost circuit used in a memory device. The boost circuit
100
receives a supply voltage (Vcc) and a boost control signal
102
to produce a boosted signal (VPXG) for use by the memory device. For example, the VPXG signal is a global programming pulse that is input to sector select circuits
104
. The sector select circuits
104
receive sector control signals
106
that activate a selected sector select circuit to produce a sector programming pulse
108
derived from the VPXG signal. The sector programming pulses
108
are received by Xdecoder circuits
110
that output boosted word line signals
112
in response to received decode signals
114
. The boosted word line signals are based on the sector pulses
108
.
However, typical boosting circuits, such as the boost circuit
100
, produce VPXG signals that are dependent on the supply voltage (Vcc). As a result, the boosted VPXG signal may have voltage variations that cause the derived word line signals to fail meeting high and low voltage margins required to operate the memory device.
FIG. 2
shows a graph illustrating a dependence relationship between core cell current (I) and a voltage derived from the core cell current in a conventional boost circuit. For example, a boosted word line voltage results in a core cell current that is converted to a voltage. The indicator at Iref indicates a current level used as a reference to compare to a core cell current to determine a data value in a memory device. The indicator I
1
indicates a desired current level to be read from the core cell to determine a data value of 1, and the indicator I
0
indicates a desired current level to be read from the core cell to determine a data value of 0.
If the word line voltage is dependent on supply voltage, the core cell current created by the varying word line voltage may degrade current margins such that it becomes difficult to read the core cell data value. For example, if the word line voltage is too low or too high, the current margin to read a data value of 1 or 0 will become smaller. Thus, if the boosted word line has a power supply dependence, power supply variation may result in degraded memory operation.
Therefore is would be desirable to have a booster circuit that operates independently from supply voltage to produce boosted signals in a memory device.
SUMMARY OF THE INVENTION
The present invention includes a system-that provides for word line boosting that is independent of supply voltage. The system includes a pre-charge stage to pre-charge a capacitive boost element, and a boost stage to produce the boosted memory signal. Thus, the boosted memory signal is boosted independently of the supply voltage (Vcc).
In one embodiment of the invention, a circuit for providing a boosted signal used to produce a word line signal in a memory device is provided. The circuit includes a precharge stage that has an output terminal and is coupled to receive an address signal and a boost control signal. The pre-charge stage operable to produce the boosted signal having a pre-charged level at the output terminal. The circuit also includes a capacitive element that has a first and a second terminal. The first terminal of the capacitive element is coupled to the output terminal. A boost stage is included that is coupled to receive the boost control signal and produce a boost activation signal at a boost stage output terminal that is coupled to the second terminal of the capacitive element. When the boost activation signal is active, the boosted signal is set to a selected boost level that is independent of supply voltage.
In another embodiment of the invention, a method for providing a boosted signal used to produce a word line signal in a memory device is provided. The method includes steps of receiving an address signal, pre-charging the boosted signal to a pre-charge level, receiving a boost control signal, and boosting the boosted signal from the pre-charge level to a boosted level that is independent from a supply voltage.
REFERENCES:
patent: 6104665 (2000-08-01), Hung et al.
patent: 6134146 (2000-10-01), Bill et al.
patent: 6255900 (2001-07-01), Chang et al.
Brothers LLP Coudert
Mai Son
LandOfFree
System for word line boosting does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System for word line boosting, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for word line boosting will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2967341