Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-08-05
1999-03-30
Lee, Thomas C.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395500, 395651, 395828, 711170, G06F 1310
Patent
active
058900144
ABSTRACT:
A system and method is provided for optimizing the data transfer performance between a host computer and a peripheral data storage device adapted to transfer data in accordance with an internal set of configurable, performance setting parameters which determine the device's data transfer performance. A device driver program evaluates the I/O request stream of application programs hosted by the computer, and identifies any patterns evident in the I/O request stream. Identified I/O request patterns are matched to a corresponding set of data storage device performance setting parameters, i.e., mode parameter pages, which have been predetermined as able to optimize the data transfer performance of a data storage device for the identified I/O pattern. The new performance setting parameters are written to the data storage device which is operated in accordance therewith, thus tuning the data storage device for an application's I/O request pattern. An I/O emulator and characterization program determines various optimized performance setting parameters for a particular data storage device issuing I/O requests in an arbitrary pattern, iteratively adjusting the performance setting parameters, and evaluating the data transfer performance resulting from each parameter setting alteration until an optimized data transfer rate is achieved for that particular pattern.
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patent: 5615368 (1997-03-01), Terashima et al.
patent: 5625783 (1997-04-01), Ezekiel et al.
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Lee Thomas C.
Micronet Technology, Inc.
Rupert Douglas
LandOfFree
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