Boots – shoes – and leggings
Patent
1991-08-09
1994-09-20
Lee, Thomas C.
Boots, shoes, and leggings
395425, 36424341, 3642563, 3642564, 3642565, 364DIG1, 3649614, 3649612, G06F 1210, G06F 1200
Patent
active
053496515
ABSTRACT:
In the field of high speed computers it is common for a central processing unit to reference memory locations via a virtual addressing scheme, rather than by the actual physical memory addresses. In a multi-tasking environment, this virtual addressing scheme reduces the possibility of different programs accessing the same physical memory location. Thus, to maintain computer processing speed, a high speed translation buffer cache is employed to perform the necessary virtual-to-physical conversions for memory reference instructions. The translation buffer cache stores a number of previously translated virtual addresses and their corresponding physical addresses. A memory management processor is employed to update the translation buffer cache with the most recently accessed physical memory locations. The memory management processor consists of a state machine controlling hardware specifically designed for the purpose of updating the translation buffer cache. The memory management processor calculates an address of a location in the memory where the physical address is stored concurrently with the translation buffer cache comparing the virtual address with already stored virtual addresses. With this arrangement the memory management unit can immediately access memory to retrieve the physical address upon a "miss" by the translation buffer cache.
REFERENCES:
patent: 4264953 (1981-04-01), Douglas et al.
patent: 4525778 (1985-06-01), Cane
patent: 4586130 (1986-04-01), Butts, Jr. et al.
patent: 4587610 (1986-05-01), Rodman
patent: 4654777 (1987-03-01), Nakamura
patent: 4694395 (1987-09-01), Young et al.
patent: 4727485 (1988-02-01), Keshlear et al.
patent: 4727486 (1988-02-01), Smith et al.
patent: 4731740 (1988-03-01), Eguchi
patent: 4774653 (1988-09-01), James
patent: 4785398 (1988-11-01), Joyce et al.
patent: 4802085 (1989-01-01), Levy et al.
patent: 4825412 (1989-04-01), Sager et al.
patent: 4831520 (1989-05-01), Rubinfeld
patent: 4851991 (1989-07-01), Rubinfeld et al.
patent: 4933835 (1990-06-01), Sachs et al.
patent: 4991081 (1991-02-01), Bosshart
patent: 5029072 (1991-07-01), Moyer et al.
patent: 5230045 (1993-07-01), Sindhu
patent: 5239635 (1993-08-01), Stewart et al.
patent: 5241638 (1993-08-01), Mork et al.
Fite David B.
Fossum Tryggve
Hetherington Ricky C.
Manley Dwight P.
Murray John E.
Digital Equipment Corporation
Harrity Paul
Lee Thomas C.
Maloney Denis G.
Paciulan Richard J.
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