System for transferring length round down to cache line multiple

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process

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Details

710 5, 710 33, 712205, 712207, G06F 1300

Patent

active

060555807

ABSTRACT:
A method and system for efficiently transferring data between a host computer and a peripheral component which is removably coupled to the host computer. In one embodiment of the present invention, a peripheral component such as, for example, a network interface card receives information from a peripheral component driver, such as, for example, a network interface card driver. In this embodiment, the information triggers the peripheral component to transmit a read request to the host computer such that the peripheral component can access data present at the host computer. Next, the peripheral component determines from the information received at the peripheral component, which type of read request to transmit to the host computer. In this embodiment, the type of read request is selected such that only a desired portion of the data will be prefetched and stored in memory of the host computer. The peripheral component then transmits the read request to the host computer such that the peripheral component has access to the portion of the data. In this invention, the portion of the data is selected such that when stored in the memory of the host computer, the portion of the data will end on a boundary of the memory. Then, the peripheral component reads the portion of the data which is stored in the memory of the host computer. In so doing, the present invention minimizes CPU overhead associated with prefetching data in response to a read request from a peripheral component.

REFERENCES:
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patent: 5634025 (1997-05-01), Breternitz, Jr.
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patent: 5721865 (1998-02-01), Shintani et al.
patent: 5787475 (1998-07-01), Pawlowski
patent: 5812774 (1998-09-01), Kempf et al.
patent: 5974497 (1999-10-01), Teshome

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