System for synchronizing a block counter in a...

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Utility Patent

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C375S371000, C375S373000, C375S356000

Utility Patent

active

06169773

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a device for synchronizing a block counter in a Radio Data System (RDS).
BACKGROUND INFORMATION
Methods for synchronization of a block counter in an RDS receiver are described in standard DIN EN 50 067, in which the radio data system (RDS) is also specified. The theory underlying synchronization of the block counter is set forth in Appendix C of the above-described DIN standard.
A device for synchronizing the block counter is described in German patent application No. P 195 11 147.8.
The operating principle of the decoder in an RDS receiver is described in Appendix B of DIN EN 50 067.
European patent application No. 0 491 084 describes an apparatus for generating synchronous signals for the block synchronization of block-coded data telegrams, in which offset words, superimposed at the transmitter end on the transferred data blocks, are used to synchronize a receiver to data blocks that have been sent. For this purpose, the offset data words superimposed on the transferred signal are determined in an offset word detector, and these data words are compared with offset data words generated in a logic arrangement. If the offset word detected and the expected one generated in the logic arrangement match, synchronization is present and a synchronization signal is output.
European patent application No. 0 292 966 describes an arrangement for receiving digital data in which the synchronization of the receiver is achieved using a predetermined bit pattern (i.e., a “unique data word”) that is transferred. To improve the synchronization, even when there is a poor reception, an erroneous synchronization bit pattern can be corrected.
SUMMARY OF THE INVENTION
The present invention is advantageous in that the process steps for synchronizing of the block counter are integrated into the process steps in a specific decoder for decoding and optionally for correcting errors. Modules of the decoder can also be utilized for synchronizing of the block counter. The complexity for synchronization of the block counter and for decoding the data block can thus be considerably reduced. Additional advantages of the decoder described in German patent application No. P 1 95 20 685.1 are provided with the present invention.
Another embodiment of the present invention provides a smaller number of process steps in the decoder program.
A further embodiment of the present invention provides means for differentiating the decoder for the device according to the present invention from the conventional decoder.


REFERENCES:
patent: 5111463 (1992-05-01), Zook
patent: 5452333 (1995-09-01), Guo et al.
patent: 5546464 (1996-08-01), Raith et al.
patent: 5784390 (1998-07-01), Masiewicz et al.
patent: 195 11 147 (1996-10-01), None
patent: 195 20 685 (1996-12-01), None
European Standard, Specification of the Radio Data System (RDS) for VHF/FM Sound Broadcasting in the Frequency Range From 87.5 to 108.0 MHZ. Aug. 1996 (DIN EN 50067*).

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