System for reducing storage access latency with accessing main s

Details System for reducing storage access latency with accessing main s System for reducing storage access latency with accessing main s

1998-04-08

2000-08-01

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output command process

710 7, 710 21, 711137, 711140, 711168, G06F 1300

Patent

active

060981156

ABSTRACT:
System and method reading data from storage by speculatively accessing storage and overlapping data bus access with status determination, thereby reducing storage read access latency. Also, a system and method is provided for reducing storage read access latency by accessing a data bus substantially simultaneously with availability of data from storage. Upon receipt of a storage read request, and before status determination, the requested data is read from storage. Optionally, depending upon bus architecture or the need to minimize control circuitry, control of the data bus may speculatively be sought so that data may be loaded to the data bus upon availability from main storage, still whether or not status has been resolved. Subsequently, if status cancels the read request, further data bus loading is terminated.

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