Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2006-08-16
2009-12-29
Ellis, Richard (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
Reexamination Certificate
active
07640422
ABSTRACT:
A technique for reducing lookups to a branch target address cache (BTAC) is disclosed. In this technique, a branch target address is retrieved from the BTAC in response to a miss in looking up an instruction address in an instruction cache (I-cache). The branch target address is associated with the instruction address. The branch target address retrieved from the BTAC is stored in the I-cache. With this disclosed technique, subsequent instruction addresses are looked up in the I-cache, nonparallel to the BTAC, thus saving power by reducing needless BTAC lookups.
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Ellis Richard
Kamarchik Peter M.
Pauley Nicholas J.
QUALCOMM Incorporated
Talpalatsky Sam
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