System for reducing noise in bus having plurality of first and s

Details System for reducing noise in bus having plurality of first and s System for reducing noise in bus having plurality of first and s

1998-06-23

2000-10-24

An, Meng-Ai T.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710 15, 710100, 710126, G06F 1300

Patent

active

061381934

ABSTRACT:
An apparatus supports both (1) a cost-effective graphics device (such as an AGP device) integrated onto the motherboard, and (2) an upgradable computer system with an add-in card slot for receiving a second graphics device (such as a second AGP device) on a card. The apparatus is connected to a bus that has a first set of signals which is sensitive to noise. The apparatus also has a first switch connected to a first device, the first switch being connected to the first set of signals on the bus. The apparatus has a second switch which is adapted to be connected to a second device. The second switch is also connected to the first set of signals on the bus. The apparatus also has a detector connected to the first and second switches to enable the first switch if the first device is selected and otherwise enable the second switch.

REFERENCES:
patent: 5430457 (1995-07-01), Zenda
patent: 5608418 (1997-03-01), McNally
patent: 5608883 (1997-03-01), Kando et al.
patent: 5787307 (1998-07-01), Imoto
Intel Corp., "AGP and 3D Graphics Software,"0 product information, downloaded from www., p. 11. 1996.
M. Brinton, Inel Corp., "Intel's New Advanced Graphics Port," article, downloaded from www., Sep. 30, 1997, p.2.

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