Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
1999-11-02
2001-06-12
Shin, Christopher B. (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C709S250000, C709S241000
Reexamination Certificate
active
06247071
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to computer systems and data transmissions. More specifically, the present invention relates to a method and an apparatus for receiving an isochronous stream of data at a computer system that transfers the isochronous stream of data into a buffer within the main memory of the computer system without interrupting the processor.
2. Related Art
Recent advances in computer networking technologies have increased the speed with which data that can be supplied to a computer system over a computer network. This additional speed makes it possible to provide new services, such as streaming video and rapid Internet access to a computer system user. Unfortunately, the computer system performance that is required to provide such services can surpass the performance limitations of existing computer system designs.
One particular problem is encountered in receiving an “isochronous” stream of data from a remote transmitter, such as a satellite. Unlike other types of data transmissions across a computer network, an isochronous stream of data continues to pour in at a fixed rate regardless of whether the computer system is able to accommodate the additional data or not.
This can present significant challenges in designing a computer system to handle an isochronous stream of data. The isochronous data must somehow be buffered so that the data does not become lost before an application can view the data. However, the buffer has to be quite large to accommodate enough data to allow the application enough time to process the data. Consequently, providing enough memory to buffer the isochronous data inside of an interface card can significantly increase the cost of the interface card.
Furthermore, in a conventional computer system, transferring the isochronous stream of data from the interface card to an application in the computer system causes a processor interrupt to transfer each packet of data. This can greatly impede computer system performance because each interrupt consumes a large number of processor cycles, and large number of interrupts are required to transfer the isochronous stream of data one packet at a time.
What is needed is a computer system that is able to buffer an isochronous stream of data without incurring the cost involved in providing a significant amount of memory inside of an interface card to buffer the data.
Additionally, what is needed is a computer system that is able to transfer an isochronous stream of data to an application within the computer system without causing a large number of processor interrupts.
SUMMARY
One embodiment of the present invention provides a system for receiving an isochronous stream of data that buffers the isochronous stream of data within a main memory in a computer system. The system operates by receiving the isochronous stream of data within an interface within the computer system. The system demodulates this isochronous stream of data to translate the isochronous stream of data from a modulated analog form into a digital form. Next, the system forwards the isochronous stream of data from the interface into a buffer within the main memory of the computer system without interrupting the processor. Next, the data passes from the buffer through a driver that communicates with an application program on the computer system.
In one embodiment of the present invention, the buffer within the main memory resides within a system space in an operating system of the computer system.
In one embodiment of the present invention, the isochronous stream of data is received from a satellite.
In one embodiment of the present invention, passing the data from the buffer through the driver involves trapping to the driver on a periodic timer interrupt. The driver parses the data to determine what type of data is being received, and sends the data to the application program.
In one embodiment of the present invention, forwarding the isochronous stream of data from the interface is accomplished using direct memory access (DMA).
In one embodiment of the present invention, forwarding the isochronous stream of data from the interface into the buffer involves waiting until a local buffer within the interface is full. When the local buffer is full, the system requests control over a bus at the interface. When a grant of bus master status is received, the system transfers data from the local buffer across the bus into the buffer within the main memory.
In one embodiment of the present invention, the act of receiving the isochronous stream of data involves receiving the isochronous stream of data into the local buffer while data is being transferred from a second local buffer into the buffer within the main memory. It also involves receiving the isochronous stream of data into in the second local buffer while data is being transferred from the local buffer to the buffer within the main memory.
In one embodiment of the present invention, the buffer within the main memory is organized as a first-in-first-out (FIFO) buffer.
One embodiment of the present invention allocates the buffer within the main memory during a computer system initialization operation.
REFERENCES:
patent: 5862343 (1999-01-01), Landguth et al.
patent: 5944801 (1999-08-01), Gulick
patent: 5958027 (1999-09-01), Gulick
patent: 5991520 (1999-11-01), Smyers et al.
patent: 5996031 (1999-11-01), Lim et al.
patent: 6101368 (2000-08-01), Farnsworth et al.
patent: 6119243 (2000-09-01), Garney et al.
B2C2, Inc.
Park Vaughan & Fleming LLP
Shin Christopher B.
LandOfFree
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