System for providing fast transfers to input/output device by as

Details System for providing fast transfers to input/output device by as System for providing fast transfers to input/output device by as

1998-03-26

2000-06-27

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output access regulation

710 5, 710 12, 710 56, G06F 1312

Patent

active

060818549

ABSTRACT:
An input circuit for an input/output device adapted for use in a computer system in which a command includes information indicating an application program which initiated the command, the input circuit including a first-in first-out (FIFO) buffer circuit having a plurality of stages, each stage providing storage for commands from application programs including both data and an address for the data, a direct memory access circuit for transferring data between a buffer established in system memory by an application program and the FIFO buffer circuit, computer implemented software means for establishing a transfer buffer in system memory, circuitry for determining from a command which application program has initiated the command, and circuitry for assuring that commands from only one application program reside in the FIFO buffer circuit at any time.

REFERENCES:
patent: 5513307 (1996-04-01), Naka et al.
patent: 5707288 (1998-01-01), Stephens
patent: 5761537 (1998-06-01), Sturges et al.
patent: 5770812 (1998-06-01), Kitayama
patent: 5854640 (1998-12-01), North et al.

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