System for providing an interrogating host with information incl

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process

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Details

710 62, 710 72, 710 74, G06F 1314

Patent

active

060498404

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The present invention relates to an interface control system for use with an information processing system having a bidirectionally communicable interface interconnecting a plurality of host computers and a peripheral device, such as a printer. More particularly, the invention relates to an interface control system for reliably starting up appropriate peripheral devices while leaving unnecessary peripherals inactive, whereby the efficiency of system operation is enhanced.
A conventional information processing system of the type outlined above will now be described. FIG. 3 is a schematic diagram showing a typical example of a conventional information processing system. In FIG. 3, the system includes host computers 31, host adapters 32, for an I/O bus 33, peripheral devices 36 (e.g., printer), a controller 34 controlling the peripheral devices 36, and units 35 (e.g., printer engine) controlled by the controller 34. A single controller 34 may control a plurality of units connected thereto.
The I/O bus 33 is a bidirectionally communicable bus generally connected with devices each having a parent or child function. A parent function device (called a parent device hereunder) is a device that acquires the right to use the I/O bus and causes another device connected with the I/O bus to operate. A child function device (called a child device hereunder) is a device that performs the operation required by the parent device. Generally, host computers act as parent devices and peripheral devices assume the role of child devices. Sometimes a peripheral device may also act as a parent device.
FIG. 4 is a schematic diagram outlining an example of the operation of a conventional interface control system. What is shown in FIG. 4 is a sequence of interface control processing steps carried out after a device on the I/O bus is switched on or after a peripheral device has been reset.
With a peripheral device reset or switched on (401), a host computer issues a command (402) requesting the peripheral device to report information about itself (e.g., the type of the device and the presence or absence of data to be downloaded). The information allows the host computer to identify the peripheral device connected to the I/O bus. In response to such a command, the peripheral device sends return data (403). The host computer then transmits to the peripheral device a command for executing start-up processing (404). The peripheral device performs start-up processing (405). If there is no interruption, such as a command reception from another parent device (406a), the peripheral device terminates start-up processing (407) and notifies the host computer of the end of start-up processing (408). This completes the whole start-up processing. The procedure made of the above series of steps prepares the host computer to proceed with an ordinary process such as printing (409). The conventional technique above is described illustratively in Japanese Patent Laid-Open No. Hei 5-165588.
In the above procedure, there may occur an interruption (406b) in which the peripheral device has its ongoing start-up processing interrupted upon receipt of a command from another host computer connected to the I/O bus. Such an interruption foils the start-up processing of the peripheral, which is reset individually at that point (410). The peripheral device then enters a standby state (411) to wait for commands from a host computer (i.e., a command requesting information about the peripheral device, a command for executing start-up processing). This means that start-up processing carried out so far is wasted. The host computer must call on the peripheral device again to perform start-up processing. Thus, it takes more time than should be necessary to carry out start-up processing.
The bottleneck above is circumvented conventionally by one of two measures: using either a changeover switch attached to the I/O bus to prevent any noncommunicative device from interfering with other sequences on the I/O bus, or software for automatically swit

REFERENCES:
patent: 4393459 (1983-07-01), Huntley et al.
patent: 5659801 (1997-08-01), Kopsaftis
patent: 5737757 (1998-04-01), Hassoun et al.
patent: 5809521 (1998-09-01), Steinmetz
patent: 5826103 (1998-10-01), Whittaker

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