Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-09-19
2003-09-23
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C438S132000, C438S215000, C438S281000, C438S333000, C438S468000, C327S525000
Reexamination Certificate
active
06624499
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The invention relates generally to the field of integrated circuits and, more particularly, to fusible link programming by electromigration in semiconductor integrated circuits.
2. Description of Related Art
In integrated circuits including CMOS integrated circuits, it is often desirable to be able to permanently store information, or to form permanent connections of the integrated circuit after it is manufactured. Fuses or devices forming fusible links are frequently used for this purpose. Fuses can also be used to program redundant elements to replace identical defective elements, for example. Further, fuses can be used to store die identification or other such information, or to adjust the speed of a circuit by adjusting the resistance of the current path.
One type of fuse device is “programmed” or “blown” using a laser to open a link after a semiconductor device is processed and passivated. This type of fuse device requires precise alignment of the laser on the fuse device to avoid destroying neighboring devices. This and other similar approaches can result in damage to the device passivation layer, and thus, lead to reliability concerns. For example, the process of blowing the fuse can cause a hole in the passivation layer when the fuse material is displaced.
Another type of fuse device is based on rupture or silicide agglomeration of polyfuses. These type of fuses include a silicide layer disposed on a polysilicon layer. Contacts are coupled to the silicide layer in a pair of contact regions on either side of a fuse element to provide an electrical connection between the fuse and external components for programming and sensing (as shown in FIG.
1
A).
FIG. 1B
illustrates a top view of the typical shape and includes the fuse element and contact regions.
FIG. 2
shows a vertical cross-section view of a typical fuse construction in which the polysilicon layer
20
and the silicide layer
22
are provided at a uniform thickness disposed on an oxide layer
26
also of a uniform thickness. Generally, a nitride capping layer
24
is also provided over layers
20
and
22
.
The silicide layer
22
has a first resistance and the polysilicon layer
20
has a second resistance which is greater than the first resistance. In an intact condition, the fuse link has a resistance determined by the resistance of the silicide layer
22
. In current methods of operation, a bias is applied across the fuse resulting in either agglomeration of the silicide or a complete rupture of the fuse link. In the former method, the fuse link has a resultant resistance determined in part by that of the underlaying polysilicon layer
20
. Here, the change in resistance may not be sufficient. The latter method of programming the fuse device can damage surrounding structure and/or suffers from unreliable sensing. That is, the programmed fuse resistance is unreliable, as can be shown in reliability stress testing, because of the inconsistent nature of the rupture and/or the relatively small change typically offered in the programmed resistance. Further, these types of device programming may not be viable for use with many of the latest process technologies because of the required programming potentials, i.e. current flow and voltage levels over a requisite amount of time. The rupture method of programming also results in restrictions of metal interconnect wiring over the fuse.
Therefore, a need exists for a programming method and apparatus which initiates and aids mass transport processes to reduce the programming current, voltage and/or programming time while at the same time ensuring a reliable high and reproducible ‘programmed resistance’.
SUMMARY OF THE INVENTION
The present invention achieves technical advantages as a system, apparatus and method of programming via electromigration. A semiconductor fuse which includes a cathode and an anode coupled by a fuse link having an electrically conductive component, such as silicide, is coupled to a power supply. A potential is applied across the conductive fuse link via the cathode and anode in which the potential is of a magnitude and direction to initiate electromigration of silicide from a region of the semiconductor fuse reducing the conductivity of the fuse link. The effectiveness of programming is enhanced by commencing a temperature gradient between the fuse link and the cathode responsive to the applied potential. Portions of the semiconductor fuse can be selectively cooled in a heat transfer relationship to increase the temperature gradient. In one embodiment, a heat sink is applied to the cathode. The heat sink can be a layer of metal coupled in close proximity to the cathode while insulated from the fuse link. In another embodiment, the temperature gradient is increased by selectively varying the thickness of the underlying oxide layer such that the cathode is disposed on a thinner layer of oxide than the fuse link.
REFERENCES:
patent: 5708291 (1998-01-01), Bohr et al.
patent: 5789970 (1998-08-01), Denham
patent: 6323535 (2001-11-01), Iyer et al.
patent: 6433404 (2002-08-01), Iyer et al.
A. G. Domenicucci, Characterization of Electrically Pulsed Chromium Disilicide Fusible Links, Mat. Res. Soc. Symp. Proc., pp. 103-108, vol. 523, 1998 Materials Research Society, Hopewell Junction, NY.
Alexander Kalnitsky, et al., CoSi2Integrated Fuses on Poly Silicon for Low Voltage 0.18um CMOS Application, 0-7803-5413-3/99/$10.00© 1999 IEEE, Santa Clara, CA.
Mohsen Alavi, et al, A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS logic Process, IEEE International Electron Devices Meeting (Dec. '97), Hillsboro, OR.
Iyer S. Sundar Kumar
Iyer Subramanian
Kothandaraman Chandrasekharan
Narayan Chandrasekhar
Infineon - Technologies AG
Jackson Walker L.L.P.
Loke Steven
Magee Thomas
LandOfFree
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