System for programmably providing modified read signals within a

Details System for programmably providing modified read signals within a System for programmably providing modified read signals within a

1996-04-19

1998-10-27

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

711101, 711104, 711108, 711202, G06F 1202, G06F 1300

Patent

active

058290125

ABSTRACT:
A control store apparatus having flexibility for reprogramming of microcode. A ROM with predetermined microcode is embedded in a microprocessor. A RAM, into which predetermined microcode may be scanned, is also embedded in the microprocessor. An Address RAM stores addresses of the ROM and RAM which are entry points into the microcode. Selection bits are respectively associated with the addresses stored in the Address RAM for selecting between microcode in the ROM and microcode in the RAM. A remapping circuit provides further flexibility. The remapping circuit includes a storage array into which predetermined ROM addresses and respectively associated RAM address may be scanned. The remapping logic circuit is directly coupled to address generation circuitry in the microprocessor for receiving a first part of the ROM address, and is directly coupled to the storage array. The remapping logic circuit is thereby capable of remapping a ROM address to a RAM address efficiently. A second part of the ROM address, which may be generated later than the first part of the ROM address is routed directly to both the ROM and the RAM.

REFERENCES:
patent: 4302809 (1981-11-01), Drogichen
patent: 4761763 (1988-08-01), Hicks
patent: 4982360 (1991-01-01), Johnson et al.
patent: 5007020 (1991-04-01), Inskeep
patent: 5034927 (1991-07-01), Kasa
patent: 5237669 (1993-08-01), Spear et al.
patent: 5367658 (1994-11-01), Spear et al.

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