Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2007-05-01
2007-05-01
Bataille, Pierre (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C711S217000
Reexamination Certificate
active
10455808
ABSTRACT:
A system for generating addresses for a digital signal processor in which the program instructions include a code for accessing a memory associated with said processor. An address calculation circuit calculates each access address to the memory on the basis of operation codes designated by the address generation code of one of the instructions and of the content of one address register selected from said address registers. Each address generation code defines an operation code to be sent to the calculation circuit. Each of the address registers is further associated with a configuration register designated at the same time as the address register by the address generation code, and each of the configuration registers contains a set of predefined operation codes, each adapted to command a predetermined calculation operation in the calculation circuit.
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Masgonty Jean-Marc
Pfister Pierre-David
Piguet Christian
Rampogna Flavio
Bataille Pierre
CSEM Centre Suisse d'Electronique et de Microtechnique SA - Rech
Jacobson & Holman PLLC
Tsai Sheng-Jen
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