Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2005-01-18
2005-01-18
Lane, Jack (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C711S170000, C711S173000, C703S020000, C703S021000
Reexamination Certificate
active
06845440
ABSTRACT:
A system for detecting/avoiding memory usage conflicts when generating and merging multi-threaded software test cases. Initially, a test case generator is given a unique segment of memory which it can use. A plurality of test cases are generated, one at a time, by the test case generator. When the first test case is generated, the memory segment used is noted. When each of the second through Nth test cases is generated, a memory segment of the same size as the first test case, but not overlapping that of the previously assigned test case(s), is assigned to each subsequent test case.
REFERENCES:
patent: 20010054121 (2001-12-01), Proch et al.
Maly John W.
Thompson Ryan C.
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