System for operating volatile memory in normal and standby modes

Details System for operating volatile memory in normal and standby modes System for operating volatile memory in normal and standby modes

1977-11-25

1978-12-19

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Data refresh

365226, 365227, G11C 1140

Patent

active

041308999

ABSTRACT:
A system including first drivers (such as TTL drivers) operatively connected to the control lines of a volatile memory for providing control and refresh functions to the memory in a normal mode, and second drivers (such as CMOS drivers) operatively connected to the control lines for providing refresh functions to the memory in a standby mode. First and second power sources are provided for providing first and second voltage levels to the first and second drivers, respectively. A diode is connected between the first and second power sources to maintain the first and second voltage levels at a predetermined differential from each other in the event that the second power source fails to prevent damage to the second drivers (CMOS) through reverse biasing.

REFERENCES:
patent: 4030084 (1977-06-01), Fisher
patent: 4050061 (1077-09-01), Kitagawa

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