System for operating a programmable logic device having a...

Details System for operating a programmable logic device having a... System for operating a programmable logic device having a...

2007-06-05

2007-06-05

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

11048333

ABSTRACT:
A code is generated for a programmable logic device (“PLD”) having a plurality of regions including at least one defective region. The code indicates a defective region or regions of the PLD. A user enters the code before running placement and routing. A guide file associated with the code blocks out the defective region(s) of the PLD during placement and routing.

REFERENCES:
patent: 4547882 (1985-10-01), Tanner
patent: 5430734 (1995-07-01), Gilson
patent: 5708667 (1998-01-01), Hayashi
patent: 5758056 (1998-05-01), Barr
patent: 5844422 (1998-12-01), Trimberger et al.
patent: 6530071 (2003-03-01), Guccione et al.
patent: 6950771 (2005-09-01), Fan et al.
patent: 7047465 (2006-05-01), Trimberger
patent: 7127697 (2006-10-01), Wells et al.
patent: 2005/0015654 (2005-01-01), Marr

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