System for measuring delay of digital signal using clock...

Details System for measuring delay of digital signal using clock... System for measuring delay of digital signal using clock...

1999-11-10

2003-05-06

Lee, Thomas (Department: 2185)

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

C713S401000, C713S502000, C327S153000, C327S159000

Reexamination Certificate

active

06560716

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to electrical circuitry and in particular to a apparatus for use in speed calibration and propagation delay.
2. Description of the Related Art
Delay elements are constructed from various logic functions such as inverters, for insertion of predetermined delay in signal path. If the system requires a multitude of these delay cells for parallel data transmission, these elements are subjected to effects of temperature, power supply voltage, manufacturing process and on-chip mismatches among these individual cells.
Delay elements are widely utilized in various data transmission systems. Their main application is the insertion of known time interval into the signal path to either increase delay or to modify the signal shape, such as duty cycle and period. All delay elements take advantage of intrinsic propagation delay through the transistors. Transistor size adjustments (width, length) and operating conditions (capacitive load, temperature, voltage supply, etc.) will result in some degree control of signal delay. The manufacturing process causes chip-to-chip variations in delay elements.
With very large scale integration, the die size also plays an important role due to performance variations across the chip. These variations come from non-uniformity of implantation, optical distortion, alignment, mask imperfections, etc., all encountered in the course of chip manufacturing.
One additional and significant cause of delay variations are thermal gradients across the chip with non-uniformly distributed power dissipation of certain functions such as clock and bus drivers. As the power dissipation varies in time by changing the driving sources, the thermal gradient will change the intended signal delays among the data channels. Therefore, it would be advantageous to have an improved delay mechanism for data channels.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for a propagation delay and time calibration. The apparatus includes a ring oscillator having a first set of elements. The apparatus also includes delay units. The ring oscillator is used to generate a clock signal used to measure the delay in signals received at the delay blocks. In the depicted examples, the clock signal generated by the ring oscillator is used to run a counter that counts the delay between a transition in a data signal and a reference signal. Each of the delay units includes a second set of elements matching those of the first set of elements in the ring oscillator. The elements in the set of elements are selected such that they track the period of the ring oscillator signal generated by the ring oscillator. This tracking allows the resolution of the delay adjustment to be as small as the period of the ring oscillator. The delay units are used to implement the desired delay.


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