Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2000-06-02
2003-04-08
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S033000, C710S048000, C710S260000, C712S225000, C711S111000
Reexamination Certificate
active
06546438
ABSTRACT:
TECHNICAL FIELD
This invention relates generally to the field of interfacing components and, more particularly, to an intelligent module for interfacing an IDE hard disk drive with an MFM-based control system.
BACKGROUND OF INVENTION
In the mid-1980's, hard disk drives (herein-after referred to as hard disks) often utilized electrical interfaces compliant with the IEEE 412 standard. Such hard disks are often referred to as “dumb” devices, as they must be told what to do and when to do it (e.g., by a controller). In such a system, physical media is remote from controller electronics, meaning the interface break lies between the mechanical portion of the drive (i.e., the magnetic media, stepper motors, heads, etc.) and the controller electronics.
With hard disks adhering to this standard, signals are transferred from a controller to the hard disk over two separate sets of conductors: a control cable and a data cable. The control cable contains all the necessary signals to select the correct drive, cylinder, and head, as well as status signals from the drive notifying the controller of the location of the sector, index, track
0
, drive readiness, etc. Meanwhile, the data cable is used for transmitting differential read and write lines.
Among other schemes, devices adhering to the IEEE 412 standard employed a bit encoding scheme known as Modified Frequency Modulation (“MFM”) to store data onto media. In the early 1990's, however, with the development of the Advanced Technology Attachment (“ATA”) disk drive interface standard (commonly known as the Integrated Device Electronics (“IDE”) interface), IEEE 412 technology became obsolete. Thus, advancements in and production of IEEE 412 components, such as MFM hard disks, curtailed, and replacement parts for these components have become increasingly hard to find.
In contrast to “dumb” devices, such as MFM hard disks, the controller electronics of an IDE hard disk are moved out with the mechanical portion of the drive, thus changing the drive interface from being between the media and the controller, to being between the controller and the host processor. Therefore, the interfaces for each of these drives are considerably different.
When viewed from an interfacing standpoint, the differences between the two technologies have heretofore made replacing an IEEE 412 component with an IDE component difficult. For example, due to hardware and software constraints, interfacing an IDE hard disk with control systems designed to interface with an MFM hard drive has not been simple or practical for most users. Accordingly, it would be advantageous to provide an apparatus and method that would allow users of IEEE 412 control systems to interface with IDE components, such as IDE hard drives.
SUMMARY OF THE INVENTION
It is one object of this invention to provide an IEEE 412 to IDE interface.
It is another object of this invention to provide a simple module capable of interfacing IDE components in systems utilizing an IEEE 412 interface, without the need to change the configuration or the software of the system.
Still another object of the present invention is to provide an intelligent module capable of interfacing with the system while remaining transparent to the system.
Yet another object of this invention is to provide an interface module capable of emulating an interface to an MFM hard disk(i.e., a spinning disk with heads floating over a media surface, a stepper motor cylinder selection, and head and drive selects) when using an IDE hard drive.
According to one embodiment of the present invention, a system for interfacing components is provided. The system includes memory, a processor, and a management module. The management module is in communication with the memory and the processor, and is configured to receive from a first component a request for an access operation comprising one of at least a write operation and a read operation, and involving a requested data address associated with a second component. The management module is also configured to determine whether data corresponding to the requested data address is missing from the memory. In addition, the management module is configured to perform the access operation, as well as to interrupt and resume the access operation when the data is missing from the memory, wherein the processor is configured to load the data from the second component to the memory while the access operation is interrupted. According to such an embodiment, modified data is converted from a first communication type to a second communication type and written over the data in the memory and in the component during a write operation, and the data is converted from the second communication type to the first communication type and read by the first component during a read operation.
Still other aspects of the present invention will become apparent to those skilled in this art from the following description wherein there is shown and described various embodiments of this invention, simply by way of illustration. As will be realized, the invention is capable of other different aspects and embodiments without departing from the scope of the invention. Accordingly, these exemplary objects are not intended to, nor do they, limit the scope of the present invention in any way, and the drawings and descriptions should be regarded as illustrative in nature and not as restrictive in nature.
REFERENCES:
patent: 5546398 (1996-08-01), Tucker et al.
patent: 5557622 (1996-09-01), Hassoun et al.
patent: 5610725 (1997-03-01), Kawada et al.
patent: 5940652 (1999-08-01), Hirakawa
patent: 5946215 (1999-08-01), Mito
patent: 6396030 (2002-05-01), Hashimoto et al.
patent: 6456628 (2002-09-01), Greim et al.
Batterson Russell F.
Katsetos Chris M.
Noe Jeffrey J.
Dinsmore & Shohl LLP
Gaffin Jeffrey
Mai Rijue
Siemens Energy & Automation
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