System for inspecting EUV lithography masks

Optics: measuring and testing – Inspection of flaws or impurities – Surface condition

Reexamination Certificate

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Reexamination Certificate

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06738135

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a novel system for inspecting lithography masks. Optical lithography is currently used to produce electronic chips in the semi-conductor industry.
Masks used in the Extreme Ultraviolet (EUV) lithographic process in the production of electronic chips employs a “reflection mask”. A mask blank is first prepared by coating a suitable substrate, such as a silicon wafer, with a multi layer reflector. The mask blank is then patterned by an appropriate process e.g., electron beam writing, to produce a finished mask used in the lithographic process. The pattern on the mask represents an enlarged version of the microcircuit that is to be fabricated using such mask.
Optical lithography techniques are presently used to illuminate masks in order to produce a semi conductor chip. Currently, optical lithography operates in the 130 nm node (plateau). It has been hypothecated that optical lithography may produce semiconductor chips at a lower node i.e. 100 nm, although it is not certain this can occur. It is known that smaller and smaller capability plateaus will result in chips which may be employed in faster circuits, result in denser memories, and eventually higher capacity computers.
It has been proposed that extreme ultraviolet radiation (EUV) be used in substitution for light used in optical lithography. In other words, extreme ultraviolet lithography (EUVL) employs the short wavelength illumination of the EUV radiation (10-14 nm). Recent advances in EUVL has successfully performed the lithography process employing a stepper device operating in a vacuum and using reflective optics.
The mask used for the EUVL process, however, must be free of defects. Since the features on the semi-conductor chips produced by the EUVL process are in the order of a fraction of a micrometer, any particles or in perfections on the mask on the active area of the pattern can be transferred to the pattern circuit. Such defects will cause the circuit to be improperly written and, thus, malfunction. Consequently, it is necessary to inspect the mask blanks in the EUVL process for defects before they are patterned, and to inspect the mass after patterning to make sure that no defects have been created in the pattern area by this process.
Defects generally fall into two categories, amplitude defects, and phase defects. Amplitude defects are caused by particles or other contaminants which lie on the patterned mask and absorb EUV radiation. Amplitude defects create spurious “dark spots” on a demagnified image of the pattern. Amplitude defects may also occur by particles underlying a multilayer coating, which is typical in semiconductor chip production.
Phase defects are caused by defects in the mask structure and introduce an optical path difference when the EUV light is directed to the mask. The result is a non-faithful or distorted image of the projected image on the corresponding point of the wafer.
Optical lithography is also concerned with defect-free mask blanks. However, in the case EUVL, the size of the defects on a mask blank which affects the production of a semi-conductor chip is much smaller than those of importance in optical lithography. Since the EUVL tool writes features of 0.1 micrometers and smaller, defects of 50 nanometers in size and smaller will be of significant importance.
In the past, optical systems have been developed which have allowed the detection and approximate location of small defects by sensing the scattering of light by such defects. Such instruments are effective for screening mask blanks and rejecting those with a successive number of defects. However, these systems are not applicable to patterned masks since the scattered signal from the pattern overwhelms the signal from a defect. Direct optical microscopes are of little or no use since both the features of the pattern-and the defects are below the resolution limit of an optical microscope.
In the past, reflecting soft X-ray microscopes have been produced to observe the microscopy of biological and semiconductor elements. However, these systems require optics to concentrate the soft X-ray beam and are non-specific as to examination of a certain area of a surface being analyzed. Reference is made to U.S. Pat. No. 5,177,774 which describes a soft X-ray system of this type.
A system which inspects defects in EUV lithography masks would be a notable advance in the electronics field.
BRIEF SUMMARY OF THE INVENTION
In accordance wit the present invention a novel and useful system for inspecting defects in EUV lithography masks is herein provided.
The mask of the present invention employs a laser plasma source which is produced by a Q-switched pulsed laser. Such a laser produces a pulsed coherent electromagnetic beam that impinges on a metallic target such as one composed of gold, copper, or the like creating an EUV beam. The EUV beam is essentially continuous and possesses a wavelength that ranges between 10 and 16 nanometers. Typically a bandwidth is selected which generally coincides with the narrow wavelength band around the wavelength of operation for manufacturing chips using the EUV mask.
After production of the EUV beam, the “light” is delivered to a EUV mask by a focusing or condensing means. Such means may take the form of a multimirror, multilayer-coated condenser known as a Schwarzschild system. The collection angle of the Schwarzschild system is designed to match the collection angle of the stepper condenser employed to produce the semi-conductor chip. An aperture plate is employed to define the cross-sectional area of the condensed EUV beam for impingement on and reflection from the lithography mask. The image of illumination is as small as 20 by 20 micro meters area of the mask. Fiducial-based location or mask positioning is accomplished with conventional transfer systems used to move mask blanks from a standard container to the inspection area for use with the system of the present invention.
The image of the small area illuminated on the mask blank is reflected from the mask and passed to a transmission zone plate. The transmission zone plate collects and resolves an image of the EUV reflected from the lithography mask. The beam is passed to a detector for receiving the EUV beam and producing an aerial image of the mark. The image may be displayed on a charge coupled device camera (CCD camera). The image is then analyzed for defects within the observational field of view for both patterned and unpatterned fields. The effective aerial image pixel size is approximately 20 nanometers. An image is found on the detector in less than one second of CCD integration based on the EUV flux from the laser plasma source producing the EUV beam.
It may be apparent that a novel and useful system for inspecting EUV lithography masks has been hereinabove described.
It is therefore an object of the present invention to provide a system for inspecting EUV lithography masks which is capable of assessing the severity of a defect utilizing high-speed scanning tools directly observing the aerial image, which is the same as that presented to the wafer in an actual stepper apparatus.
Another object of the present invention is to provide a system for inspecting EUV lithography masks that are capable of alignment of the mask blank fiducials and is capable of employing a semi-automatic fiducial mark detection system to locate the effected area on a EUV mask or reticle.
Yet another object of the present invention is to provide a system for inspecting a EUV lithography mask which is capable of inspecting unpatterned and patterned EUV reticles.
Another object of the present invention is to provide a system for inspecting EUV lithography masks that utilizes a compact laser produced plasma EUV source and also provides for EUV optics.
Yet another object of the present invention is to provide a system for inspecting an EUV lithography mask under illumination conditions which match EUVL stepper conditions in the manufacturing of a semi conductor chip.
A further object of the present invention i

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