System for information processing comprising plurality of proces

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation

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710 3, 710120, 711148, 711151, 364230, 3642306, G06F 13374

Patent

active

060237392

ABSTRACT:
In this device, each processor (P1 to P3) is associated with at least one dressable space (R1 to R3), whereas all the processors and all the addressable spaces are in communication by way of a common communication bus (BC).
Between all the processors and each addressable space is connected an intercommunicating connection node (N1 to N3), each connection node including control means (LC, D1, D2) for

REFERENCES:
patent: 4495567 (1985-01-01), Treen
patent: 4928234 (1990-05-01), Kitamura et al.

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