Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-11-21
2006-11-21
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S756000, C714S784000, C714S762000
Reexamination Certificate
active
07139962
ABSTRACT:
The present invention is a method and system for encoding digital data. The encoding system proceeds the step of calculating error detection code and the step of scrambling the main data at the same time to decrease times for the access to the first memory. The present invention comprises a second memory. The encoding system can access more than one recording column per-time, which further decreases times for the access to the first memory.
REFERENCES:
patent: 6470473 (2002-10-01), Iwasa
patent: 6487293 (2002-11-01), Sako et al.
patent: 6772386 (2004-08-01), Iwata et al.
patent: 6963296 (2005-11-01), Oki et al.
Lin Li-Lien
Wu Wen-Yi
Abraham Esaw T.
De'cady Albert
Fortney Andrew D.
Media Tek Inc.
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