System for dynamic buffer allocation comprising control logic fo

Details System for dynamic buffer allocation comprising control logic fo System for dynamic buffer allocation comprising control logic fo

1997-07-18

2000-06-06

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 22, 710 52, 710 53, 710100, 710101, 710128, 711 1, 711117, G06F 1202

Patent

active

060731907

ABSTRACT:
A system for dynamically allocating buffers between components in a computer system is described. The system uses matched sets of bi-directional buffers to control data flow between the processor and the computer bus. The dynamic buffer allocation system allows simultaneous data transfer from the processor to the buffers, and from the buffers to the computer bus.

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