Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
2006-04-18
2006-04-18
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C708S174000, C708S490000
Reexamination Certificate
active
07032121
ABSTRACT:
A signal is generated by providing a clock signal having a frequency (fosc). The clock frequency foscis arithmetically divided by an output frequency (fo) associated with the signal to obtain a ratio R and a remainder given by x/y. The signal is derived from the clock signal by successively dividing the frequency (fosc) of the clock signal by one of R and R+1, such that a fraction of times that the frequency (fosc) of the clock signal is divided by R is given by 1-x/y and a fraction of times that the frequency (fosc) of the clock signal is divided by R+1 is given by x/y. In particular, the signal is derived by driving a counter using the clock signal to a count value of one of R and R+1, such that a fraction of times that the counter is driven to a count value of R is given by 1-x/y and a fraction of times that the counter is driven to a count value of R+1 is given by x/y.
REFERENCES:
patent: 5287296 (1994-02-01), Bays et al.
patent: 6067411 (2000-05-01), Poimboeuf et al.
patent: 6515708 (2003-02-01), Kato
patent: 6813721 (2004-11-01), Tetreault et al.
Du Thuan
Hatteras Networks
Myers Bigel Sibley & Sajovec P.A.
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