Patent
1995-06-07
1997-11-11
Shin, Christopher B.
395300, 395439, 395836, 395 826, G06F 1320, G06F 1336
Patent
active
056873930
ABSTRACT:
A data processing system includes one or more processors connected to a common bus, one or more I/O controllers connected to the common bus and to one or more storage subsystems and one or more storage subsystems for storing data for use in the data processing system. One or more master controllers are included in each I/O controller for communicating with a memory controller referred to as a slave which controls data flow to and from a memory subsystem. The data bus between the I/O masters and the memory controller is a multi-drop operating synchronously on a two-by-two byte parallel interface.
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Brown Lawrence Marcel
Finney Damon W.
Marenin George Bohoslaw
Yanes Adalberto Guillermo
Chen Anderson I.
Clark George E.
International Business Machines - Corporation
Shin Christopher B.
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