Adalberto Guillermo Yanes

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Accelerated error detection in a bus bridge circuit

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Buffer management for improved PCI-X or PCI bridge performance

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate

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Buffer re-ordering system

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Clock generation for multiple secondary buses of a PCI bridge

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate

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Computer-implemented method, apparatus, and computer program...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1332750

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