Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...
Patent
1998-06-29
2000-08-08
Coleman, Eric
Electrical computers and digital processing systems: processing
Processing control
Context preserving (e.g., context swapping, checkpointing,...
709108, G06F 1108, G06F 1516
Patent
active
061015997
ABSTRACT:
A system and technique facilitate fast context switching among processor complex stages of a pipelined processing engine. Each processor complex comprises a central processing unit (CPU) core having a plurality of internal context switchable registers that are connected to respective registers within CPU cores of the pipelined stages by a processor bus. The technique enables fast context switching by sharing the context switchable registers between upstream and downstream CPUs to, inter alia, force program counters into the downstream registers. In one aspect of the inventive technique, the system automatically reflects (shadows) the contents of an upstream CPU's context switchable registers at respective registers of a downstream CPU over the processor bus. In another aspect of the invention, the system redirects instruction execution by the downstream CPU to an appropriate routine based on processing performed by the upstream CPU.
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Jennings William E.
Kerr Darren
Key Kenneth Michael
Wright Michael L.
Cisco Technology Inc.
Coleman Eric
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