Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Reexamination Certificate
2005-06-14
2005-06-14
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
C710S029000, C375S243000, C370S235000
Reexamination Certificate
active
06907481
ABSTRACT:
A system and methods are provided for a controlled transfer of a portion of a data stream between a digital storage media and a corresponding stream decoder. A data stream stored in digital storage media is accessed through an application. A FIFO is used to provide a buffer to the stream decoder. The application monitors the FIFO to determine when to send data related to the data stream from the digital storage media. The data is transferred to the buffer and passed to the stream decoder. A counter is used for dictating a period of time between sending segments of the data stored in the FIFO to the stream decoder. The rate of transfer to the stream decoder is adjusted through the counter to match a desired bit-rate associated with the data stream.
REFERENCES:
patent: 5159447 (1992-10-01), Haskell et al.
patent: 5974086 (1999-10-01), Oliboni et al.
patent: 5999995 (1999-12-01), Ueno et al.
patent: 6009131 (1999-12-01), Hiramatsu
patent: 6026074 (2000-02-01), Stadler et al.
ATI Technologies Inc.
Huynh Kim
Toler Larson & Abel, LLP
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