Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-09-27
2005-09-27
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S128000, C711S147000, C711S140000
Reexamination Certificate
active
06950906
ABSTRACT:
A method of operating a cache comprises the steps of reading first information from a tag memory for at least two cache lines; reading second information from the tag memory for at least two cache lines; writing third information to the tag memory updating the first information; comparing (i) an address of the tag memory associated with the step of reading the second information with (ii) an address of the tag memory associated with the step of writing the third information and, in response, selectively replacing the second information with the third information; and writing, after the step of comparing, fourth information to the tag memory updating the second information.
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Krick Robert F.
Wiens Duane A.
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