System for allowing only a partial value prediction...

Details System for allowing only a partial value prediction... System for allowing only a partial value prediction...

2005-07-26

2005-07-26

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S213000

Reexamination Certificate

active

06922767

ABSTRACT:
A computational circuit for generating a predicted address value includes an instruction field that contains an instruction value. A value immediate field is associated with the instruction field and includes a offset value and a first subset of lower-order bits. An effective address cache stores a plurality of higher-order bits of a plurality of recently-accessed memory addresses and reads out a value corresponding to a second subset of higher-order bits of a memory address that corresponds to the first subset of lower-order bits. A circuit concatenates the second subset, the first subset and the offset value, thereby generating the predicted address value.

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