System for accessing control to a peripheral device utilizing a

Details System for accessing control to a peripheral device utilizing a System for accessing control to a peripheral device utilizing a

1996-02-16

1999-08-03

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output access regulation

709 9, 709400, 712225, G06F 1516, G06F 906

Patent

active

059319232

ABSTRACT:
Method and system aspects control access through a synchronization primitive to a peripheral device in a processing system. A processing system in accordance with the present invention includes at least one central processing unit (CPU), and at least one peripheral device coupled to the at least one CPU, where the at least one peripheral device includes a synchronization primitive for controlling acquisition by at least one thread of execution from the at least one CPU. In a system aspect for controlling access, the system includes a circuit for sending a first signal from a component of the processing system to a synchronization primitive within the peripheral device to determine a state of the synchronization primitive, and acquiring control of the peripheral device when the synchronization primitive is in a released state. In a method for gaining control of a peripheral device in a processing system, the method includes sending a first signal from a component of the processing system to a semaphore register within the peripheral device to determine a bit pattern in the semaphore register, and acquiring control of the peripheral device when the semaphore register stores a first bit pattern.

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IBM Technical Disclosure Bulletin, Oct. 1984, U.S., vol. 27, No. 5, "Omega-Crossbar Network".

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