Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1998-05-27
2001-02-06
Le, Dieu-Minh T. (Department: 2785)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S011000
Reexamination Certificate
active
06185696
ABSTRACT:
DESCRIPTION
1. Technical Field
The present invention relates generally to a system for starting up a computer, and more particularly, to a system for the automatic recovery from a failure of a primary BIOS ROM in a dual BIOS ROM computer system.
2. Background of the Invention
The use of computers, especially personal computers (PCs) is widespread. The computing power of the PC, whether coupled to a network or operating as a stand-alone device, has increased significantly as new computer designs move into production. In view of the fact that many computer users are relatively unfamiliar with the technical aspects of computer operation, computer manufacturers have made a concerted effort to simplify operation of the computer. For example, many computer systems are pre-loaded with computer software so that a purchaser simply plugs the computer in and turns it on. In addition, software manufacturers have attempted to simplify the operating system itself.
However, there are still certain aspects of computer operation that baffle the typical user, and can cause significant difficulties even for the more experienced user. For example, when the computer is first powered up or reset, a software program, typically designated as a “basic input-output system” (BIOS) initializes the computer and permits the startup of an operating system, such as Microsoft MS-DOS®. The BIOS program typically resides in a read-only memory (ROM). If the BIOS ROM is defective for any reason, the computer will not function properly. Therefore, it can be appreciated that there is a significant need for a system to recover from a BIOS ROM failure in a manner that does not require user intervention. The present invention provides this and other advantages as will be apparent from the following detailed description and accompanying figures.
SUMMARY OF THE INVENTION
The present invention is embodied in a system for the automatic recovery of a BIOS ROM failure. In one embodiment, the system includes a first BIOS memory that contains a series of computer instructions to initialize the computer. The first BIOS memory has a chip enable input that is initially enabled. An error detection circuit analyzes data contained within the first BIOS memory and detects errors therein. The error detection circuit generates an error signal upon detection of errors in the first BIOS memory. The system also includes a second BIOS memory containing the series of computer instructions to initialize the computer and also having a chip enable input. An enabling circuit is included to disable the first BIOS memory chip enable input and to enable the second BIOS memory chip enable input in response to the error signal. This effectively causes the computer system to switch to the second BIOS memory so that the series of computer instructions to initialize the computer are executed from the second BIOS memory rather the first BIOS memory.
In one embodiment, the first BIOS memory is programmable and has a programming enable input. The error detection circuit verifies that the second BIOS memory does not have altered data and reprograms the first BIOS memory using the computer instructions stored within the second BIOS memory. As part of the computer instructions to initialize the computer, the computer executes a power-on self-test (POST). During the POST, the computer copies the series of computer instructions from the second BIOS memory to a random access memory (RAM). In this embodiment, the system includes a memory loader to copy the series of instructions to the RAM, and the first BIOS memory is reprogrammed using the series of computer instructions that have been copied into the RAM. The first BIOS memory may be a flash programmable read-only memory. Although not necessary, the second BIOS memory may also be a flash-programmable read-only memory.
The first BIOS memory may include a check-sum data value indicative of data values for the data contained therein. The error detection circuit uses the check sum data value to detect errors in the first BIOS memory. The error detection circuit can also use a check sum value in the second BIOS memory to detect errors in the second BIOS memory. If the error detection circuit detects an error in the second BIOS memory, reprogramming of the first BIOS programmable memory will not occur.
REFERENCES:
patent: 5245615 (1993-09-01), Treu
patent: 5327531 (1994-07-01), Bealkowski et al.
patent: 5388267 (1995-02-01), Chan et al.
patent: 5473775 (1995-12-01), Sakai et al.
patent: 5495491 (1996-02-01), Snowden et al.
patent: 5530946 (1996-06-01), Bouvier et al.
patent: 5579522 (1996-11-01), Christeson et al.
patent: 5581510 (1996-12-01), Furusho et al.
patent: 5590075 (1996-12-01), Mazzali
patent: 5630093 (1997-05-01), Holzhammer et al.
patent: 5793943 (1998-08-01), Noll
patent: 5835695 (1998-11-01), Noll
patent: 5835761 (1998-11-01), Ishii et al.
patent: 6029046 (2000-02-01), Khan et al.
patent: 6038685 (2000-03-01), Bissett et al.
Dorsey & Whitney LLP
Le Dieu-Minh T.
Micron Electronics Inc.
LandOfFree
System for a primary BIOS ROM recovery in a dual BIOS ROM... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System for a primary BIOS ROM recovery in a dual BIOS ROM..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for a primary BIOS ROM recovery in a dual BIOS ROM... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2569593