System decoder having error correcting memories for high-speed d

Details System decoder having error correcting memories for high-speed d System decoder having error correcting memories for high-speed d

1998-01-15

2000-12-05

De Cady, Albert

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

369 32, G11C 2900

Patent

active

061580392

ABSTRACT:
A system decoder having error correcting memories for high-speed data transmission and a method for controlling the same. A system decoder of an optical disk reproducing apparatus having a descrambler for restoring scrambled data in the process of encoding data, includes first and second memories for correcting an error, and a memory controller for transmitting error-corrected data to the descrambler while data read and demodulated from the optical disk is written in one of the first and second memories, and error-correcting data written in the other memory while the demodulated and error-corrected data is written and read.

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